The operative memory of a modern computer is characterized by several parameters. The most famous are volume and frequency, but memory latency, otherwise called timing, is also an important indicator.
Computer random access memory (RAM) is a volatile memory that contains OS components and running programs. The amount of memory affects how much information it can contain at the same time, and, accordingly, the number of running applications. The frequency characterizes the speed of the memory, that is, the number of operations (cycles) per second.
The progenitor of computer memory was created in 1834 by Charles Babbage. This mechanical device, called the store, stored the intermediate results of the Analytic Engine's calculations.
Latency, or timings, show the number of clock cycles spent on internal operations, in other words, timings characterize simple memory.
Memory access principle
To understand these or those timings, it is worth dwelling in more detail on memory access. Simplified, a memory chip can be represented as a table, where each cell corresponds to a memory element that stores one bit.
When a specific cell is selected, the column and row numbers are transmitted via the address bus. The first is the Row Access Strobe (RAS), then the Column Access Strobe (CAS).
After selecting a cell, various control impulses are sent to it - checking for write access, writing, reading or recharging. Moreover, there are delays between these operations, which are called timings.
Timing types
There are four different timings as specified by the memory manufacturers.
CL (CAS-latensy) - CAS latency is the wait between the CAS pulse and the start of reading. In other words, the number of ticks required to read a cell, if the required row is already open.
T RCD (Row Address to Column Address Delay) - delay between RAS and CAS pulses. Timing shows the time between opening a row and opening a column.
T RP (Row Precharge Time). This timing is the delay between the impulse to close the active line and the RAS impulse to open the next one.
Sometimes you can find a record like 6-6-6-18-24. Here the fifth number denotes the Command rate timing - the delay between the pulse for selecting a microcircuit in the memory module and the activation of the line.
The sum of these timings characterizes the delay between reading a specific memory cell if another line is open. Manufacturers most often indicate these three parameters, but sometimes you can see the fourth - T RAS.
T RAS (Row Active Time) - the number of ticks between the RAS pulse and the pulse that closes the row (Precharge), that is, the row update time. Typically, T RAS is equal to three previous timings.
For convenience, timings are given without symbols, separated by a hyphen, for example, 2-2-2 or 2-2-2-6.
